| EDA Tool Name | Tool Category | Tool Vendor | Rating |
|---|---|---|---|
| 0-In Formal Verification | Verification | Mentor Graphics | |
| 0-In® Assertion Synthesis | Synthesis | Mentor Graphics | |
| 0-In® CheckerWare® | Verification | Mentor Graphics | |
| AccelDSP Synthesis Tool | DSP Synthesis | Xilinx | |
| Actel and Aldec Prototyping | Verification | Aldec | |
| Active-HDL | Debugging Design Entry design environment PCB /Board Verification | Aldec | |
| Active-HDL Lattice Designer Edition Lite | Design Entry | Lattice | |
| Aldec DO-254 Tool Set | Verification | Aldec | |
| ALINT | Verification | Aldec | |
| BoardPlanner Co-Design | PCB /Board | Cadplex Software LLC | |
| Certify | Synthesis | Synplicity, Inc. | |
| ChipScope Pro | Debugging | Xilinx | |
| ChipScope Pro Serial I/O Toolkit | Debugging | Xilinx | |
| COAST | Place And Route | MathStar | |
| CoreConsole | Design Entry | Actel | |
| Designer | design environment | Actel | |
| Diamond DSP | DSP | 3L Limited | |
| Diamond IDE | Design Entry | 3L Limited | |
| DSP Builder | DSP | Altera | |
| eGenMem™ | Design Entry | eASIC | |
| eTools™ | Other | eASIC | |
| eWizard | Design Entry | eASIC | |
| FPGA Integrated Development Systems (IDS) | Place And Route | Atmel | |
| FPGAView™ Software | Debugging | First Silicon Solutions | |
| HDL Analyst® | Design Entry | Synplicity, Inc. |